Modeling novel double-in-plane gate electric-double-layer thin-film and nanoscale transistors.
basic_science · Level V
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- Record sourced from PubMed, PMID 21848334.
- Also identified by DOI 10.1021/nl202368z.
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Abstract
A novel double-in-plane gate oxide-based electric-double-layer (EDL) transistor structure applicable to thin-film transistors (TFTs) and nanoscale transistors (nanoFETs) is proposed. An equivalent circuit model is provided to illustrate the operation mechanism. The double-in-plane gate structure can simplify device fabrication effectively and provide unique tunability of threshold. Specifically, the gate bias modulates the threshold voltage of TFT and nanoFET and effectively controls the transistor subthreshold swing and leakage current. Moreover, the EDL gate dielectric can lead to a high gate dielectric capacitance (>1 μF/cm(2)). These simulation results provide basic understanding needed to use and control EDL TFTs and nanoFETs in a novel manner.