3D-transistor array based on horizontally suspended silicon nano-bridges grown via a bottom-up technique.
basic_science · Level V
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- Record sourced from PubMed, PMID 24481869.
- Also identified by DOI 10.1002/adma.201304245.
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Abstract
Integrated surround-gate field-effect-transistors enabled by bottom-up synthesis of nano-bridges are demonstrated. Horizontally oriented silicon nano-bridge devices are fabricated avoiding the rigorous processes for aligning and contacting nanowires grown via a bottom-up technique. Evaluation of electrical properties and a memory device application of the transistors are presented.