Design of an efficient charge-trapping layer with a built-in tunnel barrier for reliable organic-transistor memory.
basic_science · Level V
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- Record sourced from PubMed, PMID 25475911.
- Also identified by DOI 10.1002/adma.201404625.
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Abstract
A fully feasible and versatile way to fabricate highly reliable organic-transistor memory devices is made possible by a novel design of the charge-trappling layer. Gold@silica (core-shell)-structured nanoparticles are synthesized and used as the charge-trapping layer. Superior electrical reliability is obtained because the silica shell acts as a built-in tunnel potential barrier.