Van der Waals negative capacitance transistors.
basic_science · Level V
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- Record sourced from PubMed, PMID 31292435.
- Also identified by DOI 10.1038/s41467-019-10738-4 and PMC identifier 6620276.
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Abstract
The Boltzmann distribution of electrons sets a fundamental barrier to lowering energy consumption in metal-oxide-semiconductor field-effect transistors (MOSFETs). Negative capacitance FET (NC-FET), as an emerging FET architecture, is promising to overcome this thermionic limit and build ultra-low-power consuming electronics. Here, we demonstrate steep-slope NC-FETs based on two-dimensional molybdenum disulfide and CuInP<sub>2</sub>S<sub>6</sub> (CIPS) van der Waals (vdW) heterostructure. The vdW NC-FET provides an average subthreshold swing (SS) less than the Boltzmann's limit for over seven decades of drain current, with a minimum SS of 28 mV dec<sup>-1</sup>. Negligible hysteresis is achieved in NC-FETs with the thickness of CIPS less than 20 nm. A voltage gain of 24 is measured for vdW NC-FET logic inverter. Flexible vdW NC-FET is further demonstrated with sub-60 mV dec<sup>-1</sup> switching characteristics under the bending radius down to 3.8 mm. These results demonstrate the great potential of vdW NC-FET for ultra-low-power and flexible applications.