Uprooting defects to enable high-performance III-V optoelectronic devices on silicon.
basic_science · Level V
Where this comes from
- Record sourced from PubMed, PMID 31541107.
- Also identified by DOI 10.1038/s41467-019-12353-9 and PMC identifier 6754402.
- Licence recorded as CC BY.
- The licence permits redistribution, so the abstract is shown in full and the full text is available from the publisher.
Abstract
The monolithic integration of III-V compound semiconductor devices with silicon presents physical and technological challenges, linked to the creation of defects during the deposition process. Herein, a new defect elimination strategy in highly mismatched heteroepitaxy is demonstrated to achieve a ultra-low dislocation density, epi-ready Ge/Si virtual substrate on a wafer scale, using a highly scalable process. Dislocations are eliminated from the epilayer through dislocation-selective electrochemical deep etching followed by thermal annealing, which creates nanovoids that attract dislocations, facilitating their subsequent annihilation. The averaged dislocation density is reduced by over three orders of magnitude, from ~10<sup>8</sup> cm<sup>-2</sup> to a lower-limit of ~10<sup>4</sup> cm<sup>-2</sup> for 1.5 µm thick Ge layer. The optical properties indicate a strong enhancement of luminescence efficiency in GaAs grown on this virtual substrate. Collectively, this work demonstrates the promise for transfer of this technology to industrial-scale production of integrated photonic and optoelectronic devices on Si platforms in a cost-effective way.