High-Yield Ti<sub>3</sub> C<sub>2</sub> T<sub>x</sub> MXene-MoS<sub>2</sub> Integrated Circuits.

Xu, Xiangming; Guo, Tianchao; Hota, Mrinal K; Kim, Hyunho; Zheng, Dongxing; Liu, Chen; Hedhili, Mohamed Nejib; Alsaadi, Rajeh S et al. · Adv Mater · 2022

basic_science · Level V

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Abstract

It is very challenging to employ solution-processed conducting films in large-area ultrathin nanoelectronics. Here, spray-coated Ti<sub>3</sub> C<sub>2</sub> T<sub>x</sub> MXene films as metal contacts are successfully integrated into sub-10 nm gate oxide 2D MoS<sub>2</sub> transistor circuits. Ti<sub>3</sub> C<sub>2</sub> T<sub>x</sub> films are spray coated on glass substrates followed by vacuum annealing. Compared to the as-prepared sample, vacuum annealed films exhibit a higher conductivity (≈11 000 S cm<sup>-1</sup> ) and a lower work function (≈4.5 eV). Besides, the annealed Ti<sub>3</sub> C<sub>2</sub> T<sub>x</sub> film can be patterned through a standard cleanroom process without peeling off. The annealed Ti<sub>3</sub> C<sub>2</sub> T<sub>x</sub> film shows a better band alignment for n-type transport in MoS<sub>2</sub> channel with small work function mismatch of 0.06 eV. The MoS<sub>2</sub> film can be uniformly transferred on the patterned Ti<sub>3</sub> C<sub>2</sub> T<sub>x</sub> surface and then readily processed through the cleanroom process. A large-area array of Ti<sub>3</sub> C<sub>2</sub> T<sub>x</sub> MXene-MoS<sub>2</sub> transistors is fabricated using different dielectric thicknesses and semiconducting channel sizes. High yield and stable performance for these transistor arrays even with an 8 nm-thick dielectric layer are demonstrated. Besides, several circuits are demonstrated, including rectifiers, negative-channel metal-oxide-semiconductor (NMOS) inverters, and voltage-shift NMOS inverters. Overall, this work indicates the tremendous potential for solution-processed Ti<sub>3</sub> C<sub>2</sub> T<sub>x</sub> MXene films in large-area 2D nanoelectronics.