High-gain, low-voltage unipolar logic circuits based on nanoscale flexible organic thin-film transistors with small signal delays.
basic_science · Level V
Where this comes from
- Record sourced from PubMed, PMID 36608119.
- Also identified by DOI 10.1126/sciadv.add3669 and PMC identifier 9821857.
- Licence recorded as CC BY-NC.
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Abstract
One of the circuit topologies for the implementation of unipolar integrated circuits (circuits that use either p-channel or n-channel transistors, but not both) is the zero-<i>V</i><sub>GS</sub> architecture. Zero-<i>V</i><sub>GS</sub> circuits often provide excellent static performance (large small-signal gain and large noise margins), but they suffer from the large signal delay imposed by the load transistor. To address this limitation, we have used electron-beam lithography to fabricate zero-<i>V</i><sub>GS</sub> circuits based on organic transistors with channel lengths as small as 120 nm on flexible polymeric substrates. For a supply voltage of 3 V, these circuits have characteristic signal-delay time constants of 14 ns for the low-to-high transition and 560 ns for the high-to-low transition of the circuit's output voltage. These signal delays represent the best dynamic performance reported to date for organic transistor-based zero-<i>V</i><sub>GS</sub> circuits. The signal-delay time constant of 14 ns is also the smallest signal delay reported to date for flexible organic transistors.