Van der Waals Engineering of One-Transistor-One-Ferroelectric-Memristor Architecture for an Energy-Efficient Neuromorphic Array.
basic_science · Level V
Where this comes from
- Record sourced from PubMed, PMID 39898965.
- Also identified by DOI 10.1021/acs.nanolett.4c06118 and PMC identifier 11827105.
- Licence recorded as CC BY.
- The licence permits redistribution, so the abstract is shown in full and the full text is available from the publisher.
Abstract
Two-dimensional-material-based memristor arrays hold promise for data-centric applications such as artificial intelligence and big data. However, accessing individual memristor cells and effectively controlling sneak current paths remain challenging. Here, we propose a van der Waals engineering approach to create one-transistor-one-memristor (1T1M) cells by assembling the emerging two-dimensional ferroelectric CuCrP<sub>2</sub>S<sub>6</sub> with MoS<sub>2</sub> and <i>h</i>-BN. The memory cell exhibits high resistance tunability (10<sup>6</sup>), low sneak current (120 fA), and low static power (12 fW). A neuromorphic array with greatly reduced crosstalk is experimentally demonstrated. The nonvolatile resistance switching is driven by electric-field-induced ferroelectric polarization reversal. This van der Waals engineering approach offers a universal solution for creating compact and energy-efficient 2D in-memory computation systems for next-generation artificial neural networks.