Photolithography-Induced Doping and Interface Modulation for High-Performance Monolayer WSe<sub>2</sub> P-Type Transistors.
basic_science · Level V
Where this comes from
- Record sourced from PubMed, PMID 39984307.
- Also identified by DOI 10.1021/acs.nanolett.4c06407 and PMC identifier 11887443.
- Licence recorded as CC BY.
- The licence permits redistribution, so the abstract is shown in full and the full text is available from the publisher.
Abstract
To mitigate Fermi-level pinning (FLP) at the contact of two-dimensional (2D) transition metal dichalcogenides and enhance their hole carrier concentration, a 1.8 nm-thick p-doping layer is formed via photolithography. This surface treatment significantly reduces the contact resistance (<i>R</i><sub>C</sub>) to ∼4.8 kΩ·um in monolayer (1L) WSe<sub>2</sub> p-type field-effect transistors (p-FETs) and increases hole carrier concentration by 1.4 times, resulting in a field-effect mobility of ∼75 cm/V·s. After subsequent helium ion-beam lithography, the Fermi level can still be modulated from 4.25 to 4.55 eV due to the ultrathin buffer layer. This approach enables high-performance p-FETs with 1L-WSe<sub>2</sub> channels, achieving a maximum on-state current density of 420 μA/μm at a <i>V</i><sub>D</sub> of -1 V and ultralow <i>R</i><sub>C</sub> of ∼0.8 kΩ·um by the combination of the MoO<sub><i>x</i></sub> encapsulation for additional p-doping. These results demonstrate that 1L-WSe<sub>2</sub> p-FETs can attain performance comparable to 2D n-FETs, paving the way for high-performance complementary metal-oxide semiconductor transistors with 2D channels.