Vertically Integrated Dual-Memtransistor Enabled Reconfigurable Heterosynaptic Sensorimotor Networks and In-Memory Neuromorphic Computing.
basic_science · Level V
Where this comes from
- Record sourced from PubMed, PMID 40153597.
- Also identified by DOI 10.1021/acsnano.5c00683.
- No licence information is recorded for this record.
- Because redistribution is not established, this page shows the abstract only. Follow the links below for the full text.
Abstract
Neuromorphic in-memory computing requires an area-efficient architecture for seamless and low-latency parallel processing of large volumes of data. Here, we report a compact, vertically integrated/stratified field-effect transistor (VSFET) consisting of a 2D nonferroelectric MoS<sub>2</sub> FET channel stacked on a 2D ferroelectric In<sub>2</sub>Se<sub>3</sub> FET channel. Electrostatic coupling between the ferroelectric and nonferroelectric semiconducting channels results in hysteretic transfer and output characteristics of both FETs. The gate-controlled MoS<sub>2</sub> memtransistor is shown to emulate homosynaptic plasticity behavior with low nonlinearity, low epoch, and high accuracy supervised (ANN─artificial neural network) and unsupervised (SNN─spiking neural network) on-chip learning. Further, simultaneous measurements of the MoS<sub>2</sub> and In<sub>2</sub>Se<sub>3</sub> transistor synapses help to realize complex heterosynaptic cooperation and competition behaviors. These are shown to mimic advanced sensorimotor NN-controlled gill withdrawal reflex sensitization and habituation of a sea mollusk (Aplysia) with ultralow power consumption. Finally, we show logic reconfigurability of the VSFET to realize Boolean gates, thereby adding significant design flexibility for advanced computing technologies.