Sacrifice-layer-free transfer of wafer-scale atomic-layer-deposited dielectrics and full-device stacks for two-dimensional electronics.

He, Yuyu; Lv, Zunxian; Liu, Zhaochao; Yang, Mingjian; Ai, Wei; Chen, Jiabiao; Chen, Wanying; Wang, Bing et al. · Nat Commun · 2025

basic_science · Level V

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Abstract

Transfer printing techniques have enabled the fabrication of devices on soft or delicate substrates that are incompatible with conventional manufacturing processes. However, the involved sacrifice-layer removal process typically causes damage to the quality of device interfaces. Here, we develop a sacrifice-layer-free transfer printing strategy by pre-depositing the device constituents onto commercially available mica substrates. The intrinsic weak interfacial interaction enables the transfer of various pre-deposited device constituents at the wafer scale, including well-known strongly adhesive dielectrics grown by atomic layer deposition (ALD). Moreover, entire top-gated device stacks can be simultaneously transferred onto few-layer MoS<sub>2</sub> to form fully gated two-dimensional (2D) transistors, showing an atomically sharp interface, negligible gate hysteresis (~5 mV) and subthreshold swings near the thermionic limit. Importantly, the conformal growth of ALD dielectrics enables the one-step fabrication of complex top-gated Hall devices with a fully encapsulated structure, allowing multi-terminal gate-tunable transport measurements on fragile 2D materials, such as black phosphorus. Our work not only enriches the transfer printing methodologies for difficult-to-transfer materials, but also provides a method to investigate the properties of fragile 2D materials.