Etchant-Free Wafer-Scale 2D Transfer and van der Waals 3D Integration via Peel-Off Force Engineering.
basic_science · Level V
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- Record sourced from PubMed, PMID 40626578.
- Also identified by DOI 10.1021/acsnano.5c04785.
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Abstract
Clean van der Waals (vdW) contacts are critical for realizing high-performance, reliable devices and integrated circuits based on two-dimensional (2D) transition metal dichalcogenides (TMDs). However, conventional transfer methods that rely on etchants often degrade TMDs, hampering the formation of pristine vdW interfaces. Here, we suggest an etchant-free transfer technique that prevents both direct and indirect damage by precisely controlling the peel-off force (POF) through surface-tension modulation (STM). Guided by a modified Kendall's model, we determine the optimal surface tension for common, nontoxic mixtures of deionized water and ethanol, thereby maximizing the POF. Using this POF-assisted method, we fabricate high-performance 2D vdW field-effect transistors (FETs), integrating device components without etchant-induced damage. These FETs exhibit a field-effect mobility of 162.2 cm<sup>2</sup> ·V<sup>-1</sup> ·s<sup>-1</sup>, an on/off ratio exceeding 10<sup>8</sup>, a subthreshold swing of 72 mV·dec<sup>-1</sup>, and an interface trap density of ∼10<sup>12</sup> cm<sup>-2</sup>·eV<sup>-1</sup>, demonstrating high-quality vdW contacts. Finally, we suggest the all-vdW logic circuit design, demonstrated through a complementary metal-oxide-semiconductor (CMOS) logic test structure. This work demonstrates a process-compatible approach for the lab-to-fab transition of 2D TMD electronics, achieving reliable device yields and the performance levels required for next-generation vdW-integrated systems.