High-On/Off-Ratio Vertical Transistors with Defect-Engineered MoSe₂ and van der Waals VSe₂ Contacts.

Abstract

Two-dimensional material-based vertical field-effect transistors (VFETs) have recently garnered significant attention for their potential to enable straightforward formation of ultrashort channel lengths below a nanometer. However, their performance is often limited by unintended leakage currents arising from negative threshold voltages (<i>V</i>_th) and the existence of gate-field-free regions (GFFRs). To address this challenge, leakage currents through the GFFRs must be effectively suppressed under a zero gate bias. In this study, we demonstrate high-performance n-channel MoSe₂ VFETs with effective leakage current suppression through GFFRs, achieving on/off current ratios exceeding 10⁵. A vacuum pre-annealing process enables the formation of a low-defect-density MoSe₂ channel with a near-zero <i>V</i>_th, thereby significantly reducing the leakage currents. Furthermore, the integration of high-work-function VSe₂ as a drain electrode forms a defect-free van der Waals contact, suppressing the tunneling currents in the gate-modulated region. As a result, the defect-engineered MoSe₂ VFET exhibited an on/off ratio that was 3 orders of magnitude higher than that of the leakage-prone MoS₂ VFET. These findings provide valuable insights into charge transport mechanisms and defect-suppression strategies, laying the foundation for advancements in next-generation VFET technologies.