Large-scale crossbar arrays based on three-terminal MoS₂ memtransistors.

Abstract

Memristive crossbar architectures are promising as efficient, low-power inference engines for edge AI applications. However, inputs with minor differences often yield similar outputs, requiring additional processing methods such as confidence scoring, feedback mechanisms, crossbar redundancy, or hybrid analog-digital approaches to resolve. These methods can be impractical for resource-limited edge devices. In contrast, three-terminal memtransistors can dynamically tune conductance via gate control, effectively resolving similar outputs and enhancing separability without retraining. Here, we present dense, large-scale crossbar array architectures incorporating up to 2048 MoS₂ memtransistors per array, achieving >92% yield across multiple arrays while individual memtransistors exhibit write energies as low as ~0.2 fJ, maintain read margins up to 10⁵, and offer a projected retention exceeding three years. These architectures demonstrate the ability to resolve inference ambiguities through gate modulation without the need for costly retraining or reprogramming. We also validate their performance by successfully classifying handwritten digits from the MNIST database. Finally, we benchmark the performance of MoS₂ memtransistors against other 2D material-based architectures and project their potential compared to state-of-the-art AI accelerators. We believe that this work furthers the ongoing development of in-memory processors for decentralized edge applications and that future studies aimed at reducing device-to-device variation and improving long-term non-volatile memory would only enhance inference capabilities.