Fully integrated hybrid multimode-multiwavelength photonic processor with picosecond latency.
basic_science · Level V
Where this comes from
- Record sourced from PubMed, PMID 41413380.
- Also identified by DOI 10.1038/s41467-025-66561-7 and PMC identifier 12764859.
- Licence recorded as CC BY-NC-ND.
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Abstract
High-speed signal processing is crucial for increasing the data throughput in next-generation communication systems, including multiple-input multiple-output (MIMO) networks, emerging 6G architectures, and beyond. However, system scaling inevitably increases hardware complexity, computational demands, and the challenges associated with digital signal processing (DSP). The physical limitations of electronic processors constrain computational throughput and increase DSP latency, creating a critical bottleneck. Photonic processors offer a compelling alternative, with inherent advantages of broad bandwidth, low loss, massive parallelism, and ultralow latency. Nevertheless, their scalability has been hindered by integration challenges, large device footprints, and on-chip multiplexing limits. Here, we present a scalable, monolithically integrated hybrid photonic processor that simultaneously leverages mode-division and wavelength-division multiplexing. The processor integrates adiabatic mode multiplexers, mode-selective microring resonators, and balanced multimode photodetectors on a single chip. We experimentally demonstrate real-time optical MIMO signal unscrambling at 5 Gb/s and radio frequency signal unjamming in phase-shift keying transmission, performed entirely in the analog optical domain with a processing latency of just 30 ps. This work opens a pathway toward energy-efficient, ultralow-latency processors for future wireless and optical communication networks.