Ultralow P-Type Contact Resistance Enabled by Evaporated SnS Contacts.
basic_science · Level V
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- Record sourced from PubMed, PMID 41667410.
- Also identified by DOI 10.1021/acs.nanolett.5c05534.
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Abstract
Two-dimensional (2D) semiconductors are promising candidates for continued complementary metal-oxide semiconductor (CMOS) scaling, yet scalable p-type contacts still lag behind despite substantial progress in n-type contact engineering (e.g., semimetals). Here, we present a semiconductor-semiconductor van der Waals (S-S vdW) contact strategy in which the low density of states and low-energy deposition of SnS effectively suppress metal-induced gap states and defect-induced gap states. As a result, SnS contacts exhibit minimal Fermi-level pinning and enable a negligible hole-injection barrier, which is unattainable using conventional high-work-function metals such as Pd or Pt. Furthermore, SnS-WSe<sub>2</sub> transistors demonstrate a high on-off ratio of >10<sup>10</sup>, a contact resistance as low as 395 Ω μm, and an on-state current density of up to 1.11 mA μm<sup>-1</sup> at <i>V</i><sub>DS</sub> = -2 V with a 60 nm channel length. This work provides a practical and reliable pathway toward high-performance 2D p-FETs and scalable 2D CMOS integration.