A hardware-adaptive learning algorithm for superlinear-capacity associative memory on memristor crossbars.
basic_science · Level V
Where this comes from
- Record sourced from PubMed, PMID 41730915.
- Also identified by DOI 10.1038/s41467-026-69958-0 and PMC identifier 13039397.
- Licence recorded as CC BY-NC-ND.
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Abstract
The human brain recalls complete patterns from partial cues via associative memory, but Hopfield neural networks emulating this process are inefficient on conventional hardware, and prior memristor-based implementations are vulnerable to device defects and have limited capacity, particularly for continuous patterns. We introduce a hardware-adaptive learning algorithm that incorporates experimentally calibrated device constraints during training and validate it on an integrated memristor crossbar compute-in-memory platform. The approach improves defect tolerance and effective capacity, achieving threefold higher capacity than a pseudo-inverse baseline at 50% stuck-at faults. The same framework extends to scalable multilayer architectures supporting binary and continuous-valued patterns, where we observe superlinear capacity scaling on correlated data (∝N<sup>1.49</sup> and ∝N<sup>1.74</sup>, respectively). Leveraging crossbar parallelism with synchronous updates, the implementation reduces energy by 8.8× and latency by 99.7% for 64-dimensional patterns versus asynchronous schemes. These results provide a practical algorithm-hardware co-design for robust, efficient Hopfield-style associative recall.