Enabling Radiation Hardness in Solid-State NAND Storage Utilizing a Laminated Ferroelectric Stack.
basic_science · Level V
Where this comes from
- Record sourced from PubMed, PMID 41785194.
- Also identified by DOI 10.1021/acs.nanolett.5c05947 and PMC identifier 13003478.
- Licence recorded as CC BY.
- The licence permits redistribution, so the abstract is shown in full and the full text is available from the publisher.
Abstract
NAND flash forms the core of modern solid-state storage, which is critical for data-intensive AI applications, yet charge-trap NAND suffers rapid threshold-voltage (<i>V</i><sub>th</sub>) degradation under ionizing radiation, causing reliability challenges for space and defense applications. Here we show that ferroelectric field-effect transistors (FeFETs) with laminated gate stacks offer a promising route to achieving radiation resilience in vertical NAND technology. We demonstrate that large-memory-window, vertical NAND-compatible laminated poly-silicon-channel FeFETs with an 8 nm Hf<sub>0.5</sub>Zr<sub>0.5</sub>O<sub>2</sub>/3 nm Al<sub>2</sub>O<sub>3</sub>/8 nm Hf<sub>0.5</sub>Zr<sub>0.5</sub>O<sub>2</sub> stack retain a full memory window and robust switching up to 10 Mrad(air) of the total ionizing dose (TID). Programmed and erased states show negligible TID-induced drift after 1 Mrad(air), while only the erased state degrades by ∼2 V at 10 Mrad(air). Technology computer-aided design (TCAD) modeling attributes these asymmetric shifts to state-dependent traps. Compared to charge-trap NAND, laminated FeFETs exhibit ∼30-fold lower <i>V</i><sub>th</sub> degradation per unit dose, positioning them as superior radiation-resilient storage candidates.