On-Chip Direct Synthesis of 2D Semimetals for van der Waals Metal-Semiconductor Junction Transistor Arrays.
basic_science · Level V
Where this comes from
- Record sourced from PubMed, PMID 41826074.
- Also identified by DOI 10.1021/acsnano.5c20543 and PMC identifier 13045343.
- Licence recorded as CC BY-NC-ND.
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Abstract
Metallic two-dimensional (2D) materials enable van der Waals (vdW) contacts that suppress metal- and defect-induced gap states via an intrinsic interlayer gap; however, their conventional integration through film transfer or high-temperature chemical vapor deposition often damages the underlying 2D semiconductors. Here, we report a low-temperature (350 °C), transfer-free approach to form all-2D metal-semiconductor junctions with atomically clean vdW interfaces. A predeposited chalcogen layer (Te or Se) on 2H-MoTe<sub>2</sub> acts as both a reactive precursor and an encapsulation layer during patterned deposition of transition metals (Mo or Pt). Upon annealing at 350 °C, the chalcogen/transition-metal stack is converted <i>in situ</i> into metallic 2D electrodes (1T'-MoTe<sub>2</sub>, 1T-PtTe<sub>2</sub>, or 1T-PtSe<sub>2</sub>), yielding damage-free vdW contacts. The resulting 2D transistor arrays exhibit efficient hole injection, high mobility (∼24 cm<sup>2</sup>/V·s), low contact resistance, and ultralow Schottky barriers (∼31 meV), with device-to-device variation below 3.7%. These metrics were consistently reproduced across large-area device arrays, underscoring integration uniformity and scalability. This scalable, low-temperature integration approach enables the uniform formation of metallic 2D contacts and reliable 2D FET operation across large-area device arrays.