Three-Dimensional Semi-Dirac Semiconductor in a Distorted C₆₀ Solid with Gate-Tunable Quasi-1D Ultrahigh-Speed Transport.

Abstract

Combining switchable bandgaps with Dirac-like mobility remains a grand challenge for high-performance electronics. Here we propose a "3D semi-Dirac semiconductor" (3D-SDS) paradigm, integrating an intrinsic bandgap with gate-tunable, low-dimensional Dirac transport. By simulating uniaxial compression of layered C₆₀ solids, we predict a stable <b>b</b>ody-<b>c</b>entered <b>o</b>rthorhombic distorted C₆₀ solid (bco-dC₆₀) as a concrete realization, whose simulated XRD pattern aligns with unassigned experimental peaks from diamond-rich coatings. Its low-energy conduction bands form a broad and clean 3D semi-Dirac cone at the phase boundary between a trivial insulator and a topological nodal loop─well-captured by a two-band tight-binding model from a cluster-assembled hierarchical lattice. Furthermore, bco-dC₆₀ exhibits extreme electrical anisotropy with ∼95% axial polarization, enabling quasi-1D Dirac transport in the bulk. Generalizing these findings into a generalized <i>k·p</i> model and symmetry analysis, we establish the conceptual and material foundations for topological transistors, unveiling a cluster-assembly route to unite logic switching with ultrahigh-speed anisotropic transport.