Top-Gated Monolayer MoS<sub>2</sub> Transistors on Growth Substrate by One-Step Integration of High-κ Dielectrics and Low-Resistance Bilayer Contacts.
basic_science · Level V
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- Record sourced from PubMed, PMID 42057358.
- Also identified by DOI 10.1021/acs.nanolett.6c00542.
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Abstract
Fabricating top-gated transistors of 2D semiconductors directly on growth substrates holds promise for unlocking their full potential, yet faces challenges in integrating dielectrics and high-quality contacts. Here, we report top-gated monolayer MoS<sub>2</sub> (ML-MoS<sub>2</sub>) transistors directly on sapphire growth substrate via plug-and-probe one-step integration of high-κ dielectrics and low-resistance bilayer contacts. Leveraging ML-MoS<sub>2</sub> grown on high-step-density sapphire, contact electrodes, high-κ dielectrics, and gate electrodes are predeposited sequentially. The entire stack is then transferred onto another as-grown ML-MoS<sub>2</sub>, yielding top-gated transistors with atomically clean, sharp interfaces. Notably, the strong metal-MoS<sub>2</sub> interfacial interaction drives transfer of the underlying ML-MoS<sub>2</sub> with electrodes, forming low-resistance bilayer contacts. The resulting top-gated ML-MoS<sub>2</sub> transistors show superior performance, including low contact resistance of ∼1.6 kΩ·μm, high on/off ratio of ∼10<sup>8</sup>, mobility of ∼42.9 cm<sup>2</sup>·V<sup>-1</sup>·s<sup>-1</sup>, and on-state current of ∼22.4 μA/μm. Furthermore, functional logic gates (inverters, NOR and NAND gates) are constructed, verifying the feasibility of this plug-and-probe approach.