Memristor-based reconfigurable architecture for binarized neural networks: Implementation and robustness analysis.

Abstract

Memristors enable computing devices with in-memory and parallel computing capabilities, making them promising for building neural network accelerators. The conductance of memristor-based synapses serves as synaptic weights in memristor-based neural networks. However, the nonlinearity and variations in memristor conductance make the precise adjustment of the conductance difficult, leading to inaccuracies in the multiply-accumulate operations that are fundamental to neural network computation. In contrast, binarized neural networks employ only two weight values, which can be effectively represented by the high and low conductance states of memristors. Thus, memristors are particularly well-suited for implementing binarized neural networks, as their performance is less affected by these device imperfections. In this paper, a memristor-based reconfigurable in-memory computing architecture for BNNs is proposed. Its reconfigurability is achieved by modularly combining dedicated memristor-based layers, including convolutional, fully connected, batch normalization, and pooling layers, enabling the construction of different network structures tailored to different tasks. Binary weights are mapped to the high and low conductance states of memristors with reference to their average midpoint, and a two-phase programming scheme is adopted to ensure stable state setting. The effectiveness of the architecture is substantiated through pattern classification tasks with memristor-based binarized multi-layer perceptrons achieving 1.75 ± 0.08% test error on MNIST, and memristor-based binarized convolutional neural networks achieving 0.73 ± 0.09% test error on MNIST and 31.52 ± 0.36% test error on CIFAR-10 (vs. 1.73 ± 0.04%/0.63 ± 0.06%/29.89 ± 0.63% for software-based counterparts). Simulation experiments further show that both networks exhibit robust noise and fault tolerance, as memristor-based binarized multi-layer perceptron tolerates up to 20% weight noise, memristor-based binarized convolutional neural network has a critical weight noise threshold of 20%, and both tolerate 30% input noise and 12.5% stuck-at-fault rate without significant performance degradation.