Ferroelectric-Polarization-Modulated 2D Floating-Gate Memory Enabling a 10<sup>6</sup> On/Off Ratio under ±1 V Gate-Voltage Sweep.
basic_science · Level V
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- Record sourced from PubMed, PMID 42234439.
- Also identified by DOI 10.1021/acs.nanolett.6c00900.
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Abstract
Floating-gate transistors based on 2D materials have attracted great interest owing to their superior memory characteristics and high reliability. However, most reported devices still suffer from high operating voltages, limited multifunctionality, etc. Here, we proposed a ferroelectric-polarization-modulated floating-gate transistor (FMFGT) based on a CIPS/MLG/hBN/MoS<sub>2</sub> van der Waals heterostructure. The switchable and stable ferroelectric polarization of CIPS effectively reduces the tunneling barrier, exhibiting an on/off ratio (>10<sup>6</sup>) when the sweep voltage is reduced to 1 V. In addition, the FMFGT exhibits robust dynamic response under an ultrafast pulse (∼20 ns) and achieves a maximum on/off ratio exceeding 10<sup>9</sup>. Furthermore, the device demonstrates controllable synaptic plasticity under diverse stimuli, facilitating the integration of multiple optoelectronic logic gates. This work provides new insights into the role of ferroelectric polarization in floating-gate devices and establishes a promising solution toward low-voltage, multifunctional memories in edge computing and artificial intelligence.