Monolithic Integration of Reliable Memristor Arrays and a Homogeneous 1T1R Unit Using All-Solution-Processed MoS₂.

Abstract

Solution-processed two-dimensional (2D) semiconductors could enable large-area fabrication of electronics, while suffering from device variability and reliability limited by random nanosheet exfoliation, film assembly, and filament formation. Through design-technology co-optimization (DTCO), a wafer-scale uniform film of MoS₂ nanosheets (thickness of 2.63 ± 1.10 nm and lateral size of 1.62 ± 0.47 μm) via cation-assisted intercalation and interfacial self-assembly, enabling enhancing device reliability through an embedded-electrode design. Inside the film, a percolative network possesses evenly distributed interflake junctions, confining ion transport along predefined void pathways. This yields MoS₂ memristors offering narrow switching voltage distributions (<i>V</i>_set = 1.94 ± 0.45 V, and <i>V</i>_reset = 0.99 ± 0.37 V), stable endurance, and retention over 10⁴ s , demonstrated across a 6 × 8 fabricated crosspoint memristor array with a 93.75% yield , and further integrated into 10 × 10 crossbar arrays. Moreover, MoS₂ ink-based one-transistor one-memristor (1T1R) is featured with precise switching window control and current compliance modulation. This work offers a scalable and reliable route to high-density memory and hardware neuromorphic computing architectures with all-solution-processable 2D semiconductors.